@calvinandhobbes So what you're saying in your examples is that cables are making no difference. Got it.
However, your hypothetical, post transport 'digital impacts' are not bounded by any quantitative values, yet they are specifically quantitative, e.g. "DAC still outputs the correct voltage levels, but at slightly the wrong instants in time" How much time are we talking about here? For example, memory chips there is a specification for variations in edge trigger (the point when they transition from a 'zero' to a 'one' - all bits should do this at the same time) that determines their upper bandwidth limitation. So be usable at 1 GHz the edge triggers must align within 1/10^9 or 1 nanosecond. The requirement for audio is ten thousand times greater, 10 microseconds or 100KHz. With modern chips and memory routinely operating in the 2-4 GHz range audio is not a very high bar for modern digital circuits. Concerns over picoseconds or nanoseconds of jitter are pointless when the requirement is ten thousands of times easier..
"Adds a noise floor “haze”, Can cause intermodulation distortion" The noise floor is a quantitative value, so any perturbations of it should be easily documentable, as should the threshold of audibility. Right now, in my office I'm listening at an average level of about 68 dBA, with peaks of 87 dBA. The noise floor is a very quiet 40dB, so the dynamic range of my system is 47dB. Adding 10, even 20dB of volume and the total dynamic range is now pushing 60-70 dB. Any argument that that these artifacts, existing 80dB, 90dB or more down, are audible are specious at best.
Reference Voltage Pollution "The DAC’s internal scale is wobbling, so each sample isn’t output at the exact intended level.". Again, this is a quantitative value, so some examples of how much 'wobble' is occurring would be highly illustrative.
For context, TTL gates operate on a nominal power supply voltage of 5 volts, +/- 0.25 volts. Ideally, a TTL “high” signal would be 5.00 volts exactly, and a TTL “low” signal 0.00 volts exactly.
However, real TTL gate circuits cannot output such perfect voltage levels, and are designed to accept “high” and “low” signals deviating substantially from these ideal values.
“Acceptable” input signal voltages range from 0 volts to 0.8 volts for a “low” logic state, and 2 volts to 5 volts for a “high” logic state.
“Acceptable” output signal voltages (voltage levels guaranteed by the gate manufacturer over a specified range of load conditions) range from 0 volts to 0.5 volts for a “low” logic state, and 2.7 volts to 5 volts for a “high” logic state.
The devices 'wobble' has to be pretty severe - defective - for this to even be part of the conversation.

