@bwguy
No...trust me, just run a good quality USB cable directly to the rear USB input on the Sigma SSP. You will be amazed on how good it will sound. There’s an effortless flow of music and music sounded very natural and organic. The difference between its USB input and its other inputs are night and day. I suggest you use a very good quality USB cable in order to achieve best sound possible.
Both Classe CP 800 stereo preamp/DAC and the Sigma SSP were designed by Alan Clark, a Scotsman who was also responsible in designing other Classe products (including the SSP 800) and many great Linn products including a legendary Linn CD12 player and more recently Linn DS as well as some great legendary Mark Levinson products.
In implementing both Classe’s asynchronous USB inputs, Clark isolated the microcontroller from both the input and the audio circuit to ensure the quietest possible transfer of data and eliminate any possibility of noise induced by the source component. Both front and rear USB inputs on the Classe are asynchronous but Clark deviates from the norm in having designed and implemented their single clock substrate, which employs a high speed field-programmable gate array (FPGA) between the master clock isolators and the DACs. The FPGA accepts and buffers data from the USB microcontroller on the digital input board. He ensures that the FPGA processes data at whole multiples of its original frequency. Data are then sent to the DACs synchronously from the master audio clock of the FPGA, which is also in sync with the data pouring into the buffer from the USB microcontroller’s asynchronous transfer algorithm. At the end of this process, Clark claims, the digital information arrives at the DACs with unprecedented timing accuracy. The data are then converted to analog.
Clark calls regular asynchronous USB interfaces ’non optimal’ because the ground noise that is inevitable with computer sources pollutes the clock and the DAC in the receiver. So his solution to this has been to add an FPGA (field programmable gate array) between the USB microcontroller/receiver and the DAC, as a means of isolating both it and the audio clocks within the preamp. The USB receiver has its own clock but it’s impossible to fully isolate this because the noise levels are very high within the chip.
So in the end, the FPGA recovers only the data from the incoming signal and uses the precision clock within the CP800/Sigma SSP in order to minimise jitter.
